In fabricating field effect transistors and other electronic devices, it is often desirable to have different (complementary) conductive material for different devices at approximately the same level within the substrate. For example, complementary field effect transistors utilize p-channel transistors in one location and n-channel transistors in another location. Conductively doped polysilicon is presently the material of choice for formation of gate electrodes for such transistors. P-channel devices optimally utilize p-type polysilicon for the gate electrodes, whereas n-channel device optimally utilize r-type polysilicon for the gate electrodes. This has required multiple maskings specifically dedicated for deposition or doping of the specific polysilicon type. Each masking step in semiconductor processing increases complexity, expense and corresponding risk of destruction of the wafer being processed. Mask step minimization is a typical, but sometimes elusive, goal in semiconductor wafer processing.
It would be desirable to develop methods for forming complementary-type polysilicon field effect transistors on a substrate which eliminates at least one mask step. Although the invention arose from this primary concern, the artisan will appreciate that the invention ha s applicability to methods of forming other different (complementary) conductive regions on a substrate. The invention is intended to only be limited by the accompanying claims appropriately interpreted in accordance with the Doctrine of Equivalents.